Σχεδίαση και αποδοτική υλοποίηση της εικονικής μηχανής Java για πολυμεσικές εφαρμογές

Abstract

Java is a modern object oriented programming language, which has become popular in a wide range of systems. In recent years, it has been widely used in embedded/portable appliances, such as mobile phones, settop boxes etc. Security and portability are the main features that contributed to its wide acceptance. The portability is due to the fact that the Java binaries consist of instructions of a virtual instruction set architecture which run on a virtual machine, the Java virtual machine. The software layer between the Java binary and the host platform results in performance degradation. This dissertation focuses on the elimination of this overhead in portable systems which run multimedia Java applications. In particular, it proposes microarchitectural techniques for the efficient implementation of Java virtual machines in such systems. It puts emphasis on portability maintenance, which is of vital importance in internet and interactive TV environments, where applications can be transferred between servers and clients, or between users. Thus, the proposed techniques perform optimizations dynamically, during execution, contrary to other solutions which perform optimizations statically at compile time. In particular, this dissertation proposes techniques for dynamic translation of Java bytecodes to RISC instructions in hardware. The translation is based on the OPEX algorithm (proposed by Kharashi et al), which performs nested folding of Java bytecodes, thus removing the stack completely. Firstly, a technique which dynamically translates Java bytecodes blocks and stores the translation results (that is RISC instructions) in a special cache for reuse is proposed. The technique achieves great decoding rates and can be used in out of order superscalar RISC processors so as to exploit every possible instruction level parallelism. Secondly, this dissertation studies the incorporation of the translation acceleration in embedded systemsonchips based on the ARM processor and the AMBA bus. Specifically, it proposes a hardware peripheral which translates Java bytecodes streams into RISC instructions. What is more, it proposes an instruction set extension which accelerates the translation of Java bytecodes into RISC instructions. These instructions use wide registers and process many bytecodes in parallel. This dissertation also studies the elimination of the overhead imposed by the exception mechanism in object and array accesses. In particular, it proposes special instructions which perform these checks in hardware. What is more, the dispatch from one translated block to the other, constitutes another source of performance degradation in JIT virtual machines. That is due to the need for a long search at each branch instruction, in order to find the real address of each translated block. To address this problem, it proposes special branch instructions which keep the most recent mappings in a special cache and can be executed in just one cycle in most cases.